1. Field of the Invention
The present invention relates to bus interfaces, and more particularly to reducing switching noise in a bus interface to a large bit-width bus.
2. Description of the Related Art
As communication buses carrying data and electronic signals are designed to accommodate an increasing number of bits, the problem,, of electronic switching noise substantially increases in severity. For example, an implementation of an Asynchronous Transfer Mode (ATM) packet routing system may be designed to accommodate an entire 53-byte standard packet as a single 424-bit (53.times.8) wide data word. Unfortunately, the combined electronic switching noise resulting from the in-phase switching of four hundred or more bits of a wide data bus must be addressed for this implementation, typically at a large cost in circuit resources.
A data bus for communicating a data word includes a respective bus line for carrying each respective bit within the data word. Each of the bus lines has two states, representing two possible binary values of each respective bit. Electronic switching noise is created when a bus line switches from a first state to a second state, which corresponds to a bit carried on the bus line changing from one logic state to the other logic state. A worst case switching noise condition occurs when all bits in a large-width multiple-bit data word switch at the same time in the same direction (for instance, from all "1" s to all "0" s). The amount of switching noise increases in approximately a linear manner from an essentially zero noise condition in which no bits switch to the worst case switching condition when all the bits switch.
Data transitions in which a large number of bits switch occur infrequently. However, the bus interface circuit must be designed to withstand the very large power supply spikes that result when worst-case sequences of data words are communicated on the bus. Typically, a large power supply voltage spike results when a large number of bits of a data bus are changed in the same direction simultaneously. Thus, when the electronic switching noise becomes sufficiently large, a device connected to the bus may switch logical state unintentionally so that incorrect data is communicated via the bus.
What is needed is a bus interface circuit that reduces worst case switching noise so that potential data transmission errors are reduced.